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    Wafer Test and Yield Analysis (SE115-93-0)

    SynopsisWafer yield has always been an important performance index for a wafer fabrication plant in meeting increasing demand of semiconductor business. Yield analysis and management is in turn strongly dependant on the effectiveness of wafer test methodology.

    The first part of this short course introduces the various wafer test methodologies currently implemented in the present ULSI chip fabrication industry that includes in-line parametric tests, wafer level electrical and sort tests. The associated test issues will also be pinpointed.

    The second part of the course discusses the various mechanisms that cause yield-loss in the typical fabrication process, followed by the corresponding modeling. We will also explore the concepts of various sort yield models. In the part of yield management systems, concepts of some commonly-used analytical techniques for design, parameter & test limited yield, including techniques of design schmoos, wafer zones, wafer patterns, process windows, product sensitivity and equipment commonality will be introduced.

    What You Will Learn

    • Semiconductor process characterization
    • In-line test methodology
    • Yield models
    • Process contribution to yield loss
    • Defect density
    • Defect statistics for predicting yield

    Who Should AttendEngineers, Managers, and Support Personnel involved in the fabrication and development operations that include:

    • Process engineers
    • Test engineers
    • Yield analysis engineers
    • Product engineers
    • FA engineers
    • Reliability engineering
    • Application engineering

    PrerequisiteBasic background and understanding of semiconductor technologies.

    Course MethodologyThis course is presented in an interactive classroom style utilizing lecture, open discussion and examples.

    Course Duration2 days, 9am - 5pm

    Course Structure1) In-line parametric test

    • Wafer test structures
    • Placement and development of test structures
    • Types of parametric tests
    • In-line parametric test equipments

    2) Wafer sort
    • Performing wafer sort
    • Various wafer sort tests
    • Test issues at wafer sort

    3) Yield analysis
    • Challenges of device scaling on yield management
    • Causes for yield loss
    • Modeling of yield loss mechanism
    • Usefulness of yield models

    4) Wafer sort yield models
    • Poisson- model
    • Murphy- model
    • Seed- model
    • Yield management systems

    Upcoming Program Registration

    Upcoming Program Registration

    • 17 - 18 Jul 2013Location:Dream Catcher, Krystal PointPenang, Malaysia | Download Brochure with full course and registration details


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