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Upcoming Program Registration
- 24 - 27 May 2010Location:DreamCatcher ConsultingPenang, Malaysia | Download Brochure
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Embedded System Design Using Altera Nios II Processor (PR180-33-0)
SynopsisThis course is targeted at FPGA-based embedded system developers. This course will teach you how to design in a soft core embedded processor with an Altera FPGA. This course is focused on the hands-on development of Nios II hardware and software using the Nios II Development Kit. You will learn how to integrate a Nios II 32-bit microprocessor and test it in an Altera FPGA. You will learn how to configure and compile designs using the Quartus II software v. 8.0 and SOPC Builder tool as well as how develop and run embedded software for Nios II in the Nios II IDE. You will participate in discussions about the features and capabilities of the development board along with how to create and test your own custom IP. After taking this course you should feel confident tackling your next SOPC design.
You will learn to develop and run embedded software for the Nios II processor in the Nios II IDE and on the Nios II Command Tools. You will also be exposed to a few hardware concepts including how a Nios II 32-bit microprocessor is configured and integrated into an Altera FPGA using the Quartus II software v. 8.0 and SOPC Builder design tools. This course utilizes the Altera DE2 Board so that you can download, run, and debug your code in an Altera FPGA. You will participate in discussions about the features and capabilities of the Nios II toolchain, and after taking this course you should feel confident tackling your next embedded programming task for the Nios II processor.
Course highlight
DreamCatcher is a certified member of the Altera Training Partner Program (ATPP, http://www.altera.com/training), enabling us to provide engineers with high-quality training on Altera's products. We get regular information updates from Altera to ensure we have the tools to teach Altera's latest technologies. This course is collectively grouped from 2 teaching modules from ATPP:
What You Will Learn
Who Should AttendEmbedded Hardware Designer, Embedded Software Designer, SOC Designer
Prerequisite
Course MethodologyThis course is presented in lecturing style, interspersed with hands-on sessions. Altera Quartus II and Nios II EDS together with Altera DE2 board will be used extensively. Gaining hands on experience is emphasized.
Course Duration4 days, 9am - 5pm
Course StructureModule 1: Designing with the Nios II Processor and SOPC Builder (IEMB115) (2 days)
Nios II Hardware Development
Nios II Software Development
Nios II Software Debug
RTL Simulation
System Interconnect Fabric
Custom Instructions
Configuring the Development Board
SOPC Builder Tool Review and Usage
Advantage of IP
Example systems
Advanced capabilities and usage
System Interconnect Fabric Revisited
Avalon-MM Slaves
Avalon-MM Masters
Introduction to Avalon-ST Interface
Advanced Peripheral Design Concepts
Module 2: Developing Software for the Nios II Processor (IEMB230) (2 days)
Introduction to Nios II Processor Architecture and Design Tools
Developing Programs for Nios II
Nios II Embedded Systems
Advanced Debug Features
Hardware Acceleration and Direct Memory Access
Introduction to SOPC Builder Device Drivers
Overview of Real Time Operating Systems
Nios II Software Components

