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    Physical Programming: PowerPC (PC311)

    SynopsisEmbedded systems development requires a different skill-set from PC-based development as it presents limited resources. In addition, every architecture and platform has different advantages and disadvantages.

    In order to do good embedded systems design, the hardware and software needs to be co-designed. Hardware architectural advantages need to be exploited by targeted software to produce optimum results.

    This course introduces the basics of physical programming – exploiting hardware through targeted software for fast, small and light applications.

    What You Will Learn• General microprocessor architecture concepts with specific examples on PowerPC.

    • Optimisation concerns and techniques on how to write small, fast and light PowerPC code.

    • Systems development exploiting the PowerPC family of technologies.

    • How the tortoise beat the hare.

    Who Should Attend• Firmware/embedded software engineers.

    • Systems engineers.

    • Others who need some knowledge of PowerPC internals and applications.

    Prerequisite• Technical background or working experience with firmware or embedded design on any microprocessor family.

    Course Methodology• This course is presented classroom style, with demonstrations and workshops to provide participants with a hands-on experience of efficient embedded PowerPC development.

    Course Duration• 4 days, 9am – 5pm.

    Course StructureDay 1 – Basics


    1). Microprocessor Introduction

    • Why RISC?
    • RISC concepts and features: register, pipeline, memory. 

    2). PowerPC Introduction
    • Why PowerPC?
    • History and Roadmap of PowerPC.
    • The PowerPC Family.

    3. Ordinal Data Types and Endianness
    • Understanding the organisation of basic data types.
    • Understanding basic data structure and alignment.
    • Learning how endianness can bite you.

    4. Application Binary Interface
    • Understanding the General Purpose Registers (GPR).
    • Understanding calling conventions and parameter passing.
    • Learning the Special Function Registers (SFR).

    5. Hands-on
    • Setting up a cross-development tool-chain.
    • Writing simple low-level code.
    • Examining and debugging simple algorithms and data-structures.

    Day 2 – Standard

    1). Extended Data Types
    • Understanding pointers and complex data-structures.
    • Introducing the IEEE-754.
    • Understanding precision and trade-offs.

    2). Integer Pipeline
    • Understanding the PowerPC 7-Stage integer pipeline: Fetch, Pre-decode, Issue, Operand Load, Execute, Memory Access, Write-back.
    • Understanding the PowerPC pipelines: IEXE, JEXE, AEXE.
    • Common data/control hazards and how to overcome them.

    3). Hands-on
    • Examining and debugging complex algorithms and data-structures.
    • Profiling code performance.
    • Exploiting PowerPC performance libraries.

    Day 3 – Advanced

    1). Memory Hierarchy
    • Understanding cache memory organisation and performance: why and how with PowerPC specific configurations.
    • Understanding memory management: why and how with PowerPC specific techniques.

    2). Speculative Execution
    • Understanding and exploiting super-scalar scheduling: load/use dependence, operand dependence, compare/branch, etc...
    • Understanding and exploiting branch prediction: static/dynamic techniques.
    • Understanding memory prediction: static/dynamic techniques.

    3). Hands-on
    • Profiling memory operations.
    • Comparing 'bad' code and 'good' code.
    • Exploiting PowerPC performance libraries.

    Day 4 – Extensions

    1). Instruction Extensions
    • Understanding the use of DSP extensions.
    • Exploiting DSP extensions on the PowerPC: penalties and design trade-offs.

    2). Systems Development
    • Understanding CoreConnect.
    • Interfacing external I/O and peripherals.
    • Interfacing custom functional accelerators to the PowerPC.
    • Learning PowerPC based power management.

    3). Discussion
    • How the tortoise beat the hare – efficient algorithms and data-structures.

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