Analog IC Design - LEVEL I and LEVEL II (CP209)

Synopsis

The demand for engineers in communication-enabling technologies, who can contribute quickly upon graduation or entering the field, is increasing in tandem with the growth in communication industries and reduction in product time-to-market. Shortage of relevant skill sets are prevalent among young engineers due to the complexities of theories, lack of exposure to relevant industry tools and missing domain knowledge in various functions within the communication-enabling industries.

DreamCatcher Certification Program covers a comprehensive domain area in communication-enabling technologies, ranging from semiconductor materials and devices, circuit designs and tests, and, system integration, deployment, testing and commissioning. In collaboration with global technology partners and experts, DreamCatcher Certification Program is designed to help benchmark the expertise level of engineers working in these fields. It also provides an alternative development path for professionals to attain the relevant expertise to work in these challenging fields which see constant change of devices, systems, protocols and standards.

University typically emphasizes on the broad coverage of theories and concepts while on-the-job-training emphasizes on the ability to operate relevant industry tools. DreamCatcher Certification Program emphasizes on a balanced coverage of industry tools, domain knowledge and relevant theories and concepts for the development of specific domain expertise as illustrated below. This balanced approach will equip engineers with relevant skills to contribute more effectively when entering a specific technical field.



DreamCatcher Certification Program value propositions to young engineers and professionals are:

• To gain exposure to the state-of-the-art technologies, industry tools and software
• To gain expose to industry standard practices through case studies and projects
• To acquire knowledge and skills through a structured and extensive curriculum designed by industry experts and endorsed by global technology leaders
• To gain reassurance that his/her expertise meets industry-accepted standards, and that he/she has undertaken structured certification training program successfully, achieving the minimum benchmarked level. Therefore, certification serves as benchmark to expertise attained.

What You Will Learn

Upon successful completion of LEVEL I Certification, participants will be able

• To have a strong overview of the domain area with appreciation of underlying concepts, processes, tools and techniques employed specifically to the domain;
• To perform a prescribed range of functions involving known routines and procedures within the domain;
• To perform in a range of varied activities where there is a clearly defined choice of actions with limited complexity and limited range of applicable options to be applied, and;
• To have the relevant foundation to further acquire advanced skills within the domain.

Upon successful completion of LEVEL II Certification, participants will be able

• To have an in-depth understanding and appreciation of concepts, processes, tools and techniques employed specifically to the domain;
• To perform analysis involving complex routines and procedures within the domain;
• To perform technical decision-making activities involving a range of trade-off possibilities for technical task with limited complexity and limited range of applicable options to be applied; and
• To have the relevant in-depth understanding of the domain to further undertake experiential learning through solving technical challenges with higher complexities.

Who Should Attend

Fresh graduates or engineers interested to advance their technical career in the fields of communication-enabling technologies.

Prerequisite

For admission to LEVEL I Certification, candidates should have tertiary education level in relevant fields as follows:

• Electrical and Electronic Engineering,
• Telecommunication Engineering,
• Microelectronics Engineering,
• Computer Engineering,
• Software Engineering,

OR

3 years working experience in the relevant fields with other technical degree.


For admission to LEVEL II Certification, candidates should have tertiary education level in relevant fields as follows:

• Electrical and Electronic Engineering,
• Telecommunication Engineering,
• Microelectronics Engineering,
• Computer Engineering,
• Software Engineering,

AND

3 years working experience in the relevant fields and pass pre-entry assessment, OR completed LEVEL I Certification.

Course Methodology

The participants are first taught the relevant theories in a classroom setting. The concepts are re-enforced through tutorial and case studies of how the theories are applied in real-life. Demonstration using the state-of-the-art design and testing tools will be carried out to illustrate various principles and techniques.

The participants are then taught the use of software and hardware tools which are de-facto for the chosen domain area. The concepts are re-enforced through practical exercises on the use of the tools to test and design relevant applications.

Having acquired both practical skills in tools and pre-requisite knowledge in the domain area, the participants are required to apply their knowledge through individual or group project work. The participants will then present their project, demonstrating desired performance vs actual result.

Course Duration

LEVEL I Certification
15 days, 7 hours/day, with a total contact of 105 hours

LEVEL II Certification
15 days, 7 hours/day, with a total contact of 105 hours

Course Structure

Level I Certification

Introduction to Fabrication Process (AICD01-01)
The Bipolar IC Design Process and CMOS IC Design Process: Cross-sectional Views of integrated active devices and passive devices, ESD, latch-ups and electro-migration.

The Fabrication Process: Front-end Activities: Crystal Growth, Wafer Preparation, Chemical Vapor Deposition, Epitaxial growth, Diffusion, Thermal Oxidation, Ion Implantation, Lithography, etching, Evaporation and Sputtering; Back-end Activities: Wafer probe, die separation, packaging, testing.

Device Model (AICD01-02)
Integrated Devices: Electrical characteristics, model and design considerations for resistors, capacitors, BJTs and MOSFETs

SPICE Models: SPICE simulator and models, Long channel MOSFET, The square-law equations, small-signal models, temperature effects, Short channel MOSFET, Output resistance, trans-conductance, transition frequency, MOSFET Noise modeling.

Stability & Feedback (AICD01-03)
Loop Gain and Stability Problem:Stability Study Using Bode Plots, Frequency Compensation. Responses of Single-Pole, Two-Pole Response, Three or More Poles Amplifier.

Feedback Theory and Practical Topologies:The Series-Shunt Feedback Amplifier, The Series-Series Feedback Amplifier, The Shunt-Shunt Feedback Amplifiers, The Shunt-Series Feedback Amplifiers. The Feedback Amplifier analysis.

Analog Sub-Circuit I (AICD01-04)
Biasing circuits and basic current mirror for Long and short Channel Design:Mismatch in Current Mirrors, threshold mismatch, transconuctance paramter mismatch, drain-to-source mismatcg, lambda.Low-voltage Cascode CM, Regulated Drain Current Mirror for Long and short Channel Design.

Supply independent Biasing, constant-transconductance biasing circuits, biaisng circuits for floating current sources, biasing output stage. Hands-on Design.

Analog Sub-Circuit II (AICD01-05)
Current-mode and voltage-mode bandgap references: MOSFET-resistor voltage references. Parasitic diode-based references. Voltage-mode Bandgap reference, Current-mode bandgap references. Design example of low-voltage references. 

Introducation to Layout (AICD01-06) 
General background: Introduction to semiconductor fabrication; types of process; failure mechanism.

Structure and layout of Basic Components: Layout of circuit elements (CMOS Transistor, Resistor, Capacitor, Inductor); LASI software learning for basic drawing; Layout Hands-on exercises.

Practical considerations in Analog Circuit Layout design: Basic analog circuit design with the emphasis on layout; Matching of resistors, capacitors, and CMOS transistors; Bipolar transistor and diode; LASI practice on matching of resistor, capacitors, and CMOS transistors; Layout parasitics.

Layout Case studies: Case 1: Bandgap voltage reference; Case study 2: Wideband amplifier.
Hands-on exercise

Software Tools Used
LTspice, LASI


Level II Certification

Operational Amplifier Design (AICD02-01)
Amplifiers: Common source amplifier, Miller's Theorem, RHP Zero, Source Degeneration, Noise performance, Cancelling the RHP zero, pole splitting, Common gate amplifier, Input impedance, Common drain amplifier (Source Follower), SF as a Buffer, output impedance and stability issues.

Differential amplifiers: Source-coupled pair, source degeneration, source cross-coupled, ICMR, Differential Gain, Common-mode gain, CMRR, Input Impedance, Output Impedance, Offsets, Noise Optimisation, cascode loads, wide-swing differential amplifiers, rail-to-rail input,

Operational Amplifiers: folded-cascode amplifier, telescopic cascode amplifier, push-pull amplifier, rail-to-rail operational amplifier, OTAs, PSRR+, PSRR-, Frequency Compensation Methodologies, gain enhancements

Operational Amplifiers (Case Study). 

Linear Circuit Application - I (AICD02-02)
Linear Regulators: Series regulator, shunt regulator and LDOs. Design example of LDOs

Nonlinear analog circuits:Comparators, multipliers. POR 

Linear Circuit Application - II (AICD02-03) 
Dynamic Analog Circuits: The MOSFET Switch. Fully Differential Circuits. Switched-Capacitor Circuit. SC Circuit Examples. 

Linear Circuit Application - III (AICD02-04)
Phase Locked Loop: System theory and performance. Phase detectors, VCOs, Loop filter. Linear PLL Example. 

Linear Circuit Application - IV (AICD02-05)
Data Converter Fundamentals: Analog versus Discrete Time signals; Converting analog to digital signals; Characteristics of Sample-and-Hold circuit; Specifications of Data converters; Mixed signal layout issues.

Data Converter Architecture: DAC architectures including R-2R ladder network; Current Steering; Charge-Scaling; cyclic and Pipeline DAC. ADC architectures including Flash; sub-ranging; Pipeline, Integrating, Successive Approximation and Oversampling ADC.Emphasis on oversampling techniques of ADC. Design of Delta-Sigma data converter and relevant filters. 

Design Project II (AICD02-06)
Wideband Amplifier deisgn with Layout

Software Tools Used
LTspice, LASI